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Macros | |
#define | IP_LEV7 7 |
#define | IP_LEV6 6 |
#define | IP_LEV5 5 |
#define | IP_LEV4 4 |
#define | IP_LEV3 3 |
#define | IP_LEV2 2 |
#define | IP_LEV1 1 |
#define | IP_LEV0 0 |
#define | KN01_PHYS_MIN 0x00000000 /* 512 Meg */ |
#define | KN01_PHYS_MAX 0x1fffffff |
#define | KN01_PHYS_MEMORY_START 0x00000000 |
#define | KN01_PHYS_MEMORY_END 0x01800000 /* 24 Meg in 8 slots */ |
#define | KN01_PHYS_FBUF_START 0x0fc00000 /* frame buffer memory */ |
#define | KN01_PHYS_FBUF_M_END 0x0fc20000 /* mono */ |
#define | KN01_PHYS_FBUF_C_END 0x0fd00000 /* color */ |
#define | KN01_PHYS_COLMASK_START 0x10000000 /* Color Plane mask */ |
#define | KN01_PHYS_COLMASK_END 0x11000000 /* Color Plane mask */ |
#define | KN01_SYS_PCC 0x11000000 /* Progr. Cursor Chip */ |
#define | KN01_SYS_VDAC 0x12000000 /* Color map */ |
#define | KN01_SYS_ERRADR 0x17000000 /* Write error address */ |
#define | KN01_SYS_LANCE 0x18000000 /* LANCE chip */ |
#define | KN01_SYS_LANCE_B_START 0x19000000 /* 64 KB LANCE Buffer */ |
#define | KN01_SYS_LANCE_B_END 0x19010000 |
#define | KN01_SYS_SII 0x1a000000 /* SCSI SII chip */ |
#define | KN01_SYS_SII_B_START 0x1b000000 /* 128 KB SCSI buffer */ |
#define | KN01_SYS_SII_B_END 0x1b020000 |
#define | KN01_SYS_DZ 0x1c000000 /* Serial lines (DZ) */ |
#define | KN01_SYS_CLOCK 0x1d000000 /* RTC chip */ |
#define | KN01_SYS_CSR 0x1e000000 /* System control register */ |
#define | KN01_SYS_ROM_START 0x1f000000 /* System ROM */ |
#define | KN01_SYS_ROM_END 0x1f07ffff |
#define | KN01_INT_FPA IP_LEV7 /* Floating Point coproc */ |
#define | KN01_INT_MEM IP_LEV6 /* memory controller */ |
#define | KN01_INT_CLOCK IP_LEV5 /* RTC chip */ |
#define | KN01_INT_DZ IP_LEV4 /* serial line chip */ |
#define | KN01_INT_LANCE IP_LEV3 /* Ether */ |
#define | KN01_INT_SII IP_LEV2 /* SCSI interface */ |
#define | KN01_CSR_LEDS_MASK 0x00ff /* wo - Diagnostic leds mask */ |
#define | KN01_CSR_VRGTRB 0x0001 /* ro - Red VoltageLev > Blue */ |
#define | KN01_CSR_VRGTRG 0x0002 /* ro - Red VoltageLev > Green */ |
#define | KN01_CSR_VBGTRG 0x0004 /* ro - Blue VoltageLev > Green */ |
#define | KN01_CSR_TXDIS 0x0100 /* rw - Disable DZ xmit */ |
#define | KN01_CSR_VINT 0x0200 /* rc - Vertical retrace intr. */ |
#define | KN01_CSR_MERR 0x0400 /* rc - Memory write error intr */ |
#define | KN01_CSR_MONO 0x0800 /* ro - Mono Framebuf (or none) */ |
#define | KN01_CSR_CRSRTST 0x1000 /* ro - Cursor test output */ |
#define | KN01_CSR_PARDIS 0x2000 /* rw - Disable mem parity chks */ |
#define | KN01_CSR_SELFTEST 0x4000 /* rw - Self-test ok pinout */ |
#define | KN01_CSR_MNFMOD 0x8000 /* ro - Manifacturer MOD jumper */ |
#define | KN01_CSR_MBZ 0x9800 |
#define | KN01_ERR_ADDRESS 0x07ffffff /* phys address mask ? */ |
#define IP_LEV0 0 |
Definition at line 13 of file dec_kn01.h.
#define IP_LEV1 1 |
Definition at line 12 of file dec_kn01.h.
#define IP_LEV2 2 |
Definition at line 11 of file dec_kn01.h.
#define IP_LEV3 3 |
Definition at line 10 of file dec_kn01.h.
#define IP_LEV4 4 |
Definition at line 9 of file dec_kn01.h.
#define IP_LEV5 5 |
Definition at line 8 of file dec_kn01.h.
#define IP_LEV6 6 |
Definition at line 7 of file dec_kn01.h.
#define IP_LEV7 7 |
Definition at line 6 of file dec_kn01.h.
#define KN01_CSR_CRSRTST 0x1000 /* ro - Cursor test output */ |
Definition at line 170 of file dec_kn01.h.
#define KN01_CSR_LEDS_MASK 0x00ff /* wo - Diagnostic leds mask */ |
Definition at line 162 of file dec_kn01.h.
#define KN01_CSR_MBZ 0x9800 |
Definition at line 174 of file dec_kn01.h.
#define KN01_CSR_MERR 0x0400 /* rc - Memory write error intr */ |
Definition at line 168 of file dec_kn01.h.
#define KN01_CSR_MNFMOD 0x8000 /* ro - Manifacturer MOD jumper */ |
Definition at line 173 of file dec_kn01.h.
#define KN01_CSR_MONO 0x0800 /* ro - Mono Framebuf (or none) */ |
Definition at line 169 of file dec_kn01.h.
Referenced by dev_kn01_init().
#define KN01_CSR_PARDIS 0x2000 /* rw - Disable mem parity chks */ |
Definition at line 171 of file dec_kn01.h.
#define KN01_CSR_SELFTEST 0x4000 /* rw - Self-test ok pinout */ |
Definition at line 172 of file dec_kn01.h.
#define KN01_CSR_TXDIS 0x0100 /* rw - Disable DZ xmit */ |
Definition at line 166 of file dec_kn01.h.
#define KN01_CSR_VBGTRG 0x0004 /* ro - Blue VoltageLev > Green */ |
Definition at line 165 of file dec_kn01.h.
#define KN01_CSR_VINT 0x0200 /* rc - Vertical retrace intr. */ |
Definition at line 167 of file dec_kn01.h.
#define KN01_CSR_VRGTRB 0x0001 /* ro - Red VoltageLev > Blue */ |
Definition at line 163 of file dec_kn01.h.
#define KN01_CSR_VRGTRG 0x0002 /* ro - Red VoltageLev > Green */ |
Definition at line 164 of file dec_kn01.h.
#define KN01_ERR_ADDRESS 0x07ffffff /* phys address mask ? */ |
Definition at line 177 of file dec_kn01.h.
#define KN01_INT_CLOCK IP_LEV5 /* RTC chip */ |
Definition at line 153 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_INT_DZ IP_LEV4 /* serial line chip */ |
Definition at line 154 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_INT_FPA IP_LEV7 /* Floating Point coproc */ |
Definition at line 151 of file dec_kn01.h.
#define KN01_INT_LANCE IP_LEV3 /* Ether */ |
Definition at line 155 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
Definition at line 152 of file dec_kn01.h.
#define KN01_INT_SII IP_LEV2 /* SCSI interface */ |
Definition at line 156 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_PHYS_COLMASK_END 0x11000000 /* Color Plane mask */ |
Definition at line 128 of file dec_kn01.h.
#define KN01_PHYS_COLMASK_START 0x10000000 /* Color Plane mask */ |
Definition at line 127 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_PHYS_FBUF_C_END 0x0fd00000 /* color */ |
Definition at line 125 of file dec_kn01.h.
#define KN01_PHYS_FBUF_M_END 0x0fc20000 /* mono */ |
Definition at line 124 of file dec_kn01.h.
#define KN01_PHYS_FBUF_START 0x0fc00000 /* frame buffer memory */ |
Definition at line 123 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_PHYS_MAX 0x1fffffff |
Definition at line 115 of file dec_kn01.h.
#define KN01_PHYS_MEMORY_END 0x01800000 /* 24 Meg in 8 slots */ |
Definition at line 121 of file dec_kn01.h.
#define KN01_PHYS_MEMORY_START 0x00000000 |
Definition at line 120 of file dec_kn01.h.
#define KN01_PHYS_MIN 0x00000000 /* 512 Meg */ |
Definition at line 114 of file dec_kn01.h.
#define KN01_SYS_CLOCK 0x1d000000 /* RTC chip */ |
Definition at line 143 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_CSR 0x1e000000 /* System control register */ |
Definition at line 144 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_DZ 0x1c000000 /* Serial lines (DZ) */ |
Definition at line 142 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_ERRADR 0x17000000 /* Write error address */ |
Definition at line 135 of file dec_kn01.h.
#define KN01_SYS_LANCE 0x18000000 /* LANCE chip */ |
Definition at line 136 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_LANCE_B_END 0x19010000 |
Definition at line 138 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_LANCE_B_START 0x19000000 /* 64 KB LANCE Buffer */ |
Definition at line 137 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_PCC 0x11000000 /* Progr. Cursor Chip */ |
Definition at line 133 of file dec_kn01.h.
#define KN01_SYS_ROM_END 0x1f07ffff |
Definition at line 146 of file dec_kn01.h.
#define KN01_SYS_ROM_START 0x1f000000 /* System ROM */ |
Definition at line 145 of file dec_kn01.h.
#define KN01_SYS_SII 0x1a000000 /* SCSI SII chip */ |
Definition at line 139 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_SII_B_END 0x1b020000 |
Definition at line 141 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_SII_B_START 0x1b000000 /* 128 KB SCSI buffer */ |
Definition at line 140 of file dec_kn01.h.
Referenced by MACHINE_SETUP().
#define KN01_SYS_VDAC 0x12000000 /* Color map */ |
Definition at line 134 of file dec_kn01.h.
Referenced by MACHINE_SETUP().