machine_iq80321.cc Source File

Back to the index.

machine_iq80321.cc
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2005-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: Intel IQ80321 (ARM)
29  */
30 
31 #include <stdio.h>
32 #include <stdlib.h>
33 #include <string.h>
34 
35 #include "bus_pci.h"
36 #include "cpu.h"
37 #include "device.h"
38 #include "devices.h"
39 #include "machine.h"
40 #include "memory.h"
41 #include "misc.h"
42 
43 
44 MACHINE_SETUP(iq80321)
45 {
46  char tmpstr[300];
47  struct pci_data *pci;
48 
49  /*
50  * Intel IQ80321. See http://sources.redhat.com/ecos/
51  * docs-latest/redboot/iq80321.html
52  * for more details about the memory map.
53  */
54 
55  machine->machine_name = strdup("Intel IQ80321");
56 
58 
59  snprintf(tmpstr, sizeof(tmpstr), "i80321 irq=%s.cpu[%i].irq "
60  "addr=0xffffe000", machine->path, machine->bootstrap_cpu);
61  pci = (struct pci_data *) device_add(machine, tmpstr);
62 
63  snprintf(tmpstr, sizeof(tmpstr), "ns16550 irq=%s.cpu[%i].irq."
64  "i80321.%i addr=0xfe800000 name2='serial console'",
66  device_add(machine, tmpstr);
67 
68  /* 0xa0000000 = physical ram, 0xc0000000 = uncached */
69  dev_ram_init(machine, 0xa0000000, 0x20000000, DEV_RAM_MIRROR, 0x0);
70  dev_ram_init(machine, 0xc0000000, 0x20000000, DEV_RAM_MIRROR, 0x0);
71 
72  /* 0xe0000000 and 0xff000000 = cache flush regions */
73  dev_ram_init(machine, 0xe0000000, 0x100000, DEV_RAM_RAM, 0x0);
74  dev_ram_init(machine, 0xff000000, 0x100000, DEV_RAM_RAM, 0x0);
75 
76  device_add(machine, "iq80321_7seg addr=0xfe840000");
77 
78  /* TODO: "Intel i82546EB 1000BASE-T Ethernet" */
79 
80  /*
81  * "Intel 31244 Serial ATA Controller", must be at device 6 according
82  * to NetBSD's iq80321/iq80321_pci.c:iq80321_pci_intr_map().
83  */
84  bus_pci_add(machine, pci, machine->memory, 0, 6, 0, "i31244");
85 
86  if (!machine->prom_emulation)
87  return;
88 
90  arm_translation_table_set_l1(cpu, 0xa0000000, 0xa0000000);
91  arm_translation_table_set_l1(cpu, 0xc0000000, 0xa0000000);
92  arm_translation_table_set_l1(cpu, 0xe0000000, 0xe0000000);
93  arm_translation_table_set_l1(cpu, 0xf0000000, 0xf0000000);
94 }
95 
96 
98 {
99  machine->cpu_name = strdup("80321_600_2");
100 }
101 
102 
104 {
105  MR_DEFAULT(iq80321, "Intel IQ80321", ARCH_ARM, MACHINE_IQ80321);
106 
107  machine_entry_add_alias(me, "iq80321");
108 }
109 
int prom_emulation
Definition: machine.h:149
char * cpu_name
Definition: machine.h:133
#define DEV_RAM_RAM
Definition: devices.h:364
union cpu::@1 cd
MACHINE_DEFAULT_CPU(iq80321)
MACHINE_SETUP(iq80321)
void arm_coproc_i80321_6(struct cpu *cpu, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd)
struct memory * memory
Definition: machine.h:126
void bus_pci_add(struct machine *machine, struct pci_data *pci_data, struct memory *mem, int bus, int device, int function, const char *name)
Definition: bus_pci.cc:216
struct arm_cpu arm
Definition: cpu.h:441
void * device_add(struct machine *machine, const char *name_and_params)
Definition: device.cc:252
#define DEV_RAM_MIRROR
Definition: devices.h:365
char * path
Definition: machine.h:108
int bootstrap_cpu
Definition: machine.h:136
void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length, int mode, uint64_t otheraddress, const char *name)
Definition: dev_ram.cc:134
void machine_entry_add_alias(struct machine_entry *me, const char *name)
Definition: machine.cc:697
#define ARCH_ARM
Definition: machine.h:206
Definition: cpu.h:326
void(* coproc[16])(struct cpu *, int opcode1, int opcode2, int l_bit, int crn, int crm, int rd)
Definition: cpu_arm.h:143
#define MACHINE_IQ80321
Definition: machine.h:243
MACHINE_REGISTER(iq80321)
#define MR_DEFAULT(x, name, arch, type)
Definition: machine.h:370
void arm_translation_table_set_l1(struct cpu *cpu, uint32_t vaddr, uint32_t paddr)
Definition: cpu_arm.cc:251
void arm_setup_initial_translation_table(struct cpu *cpu, uint32_t ttb_addr)
Definition: cpu_arm.cc:215
const char * machine_name
Definition: machine.h:115

Generated on Fri Dec 7 2018 19:52:23 for GXemul by doxygen 1.8.13