cpu_mips.cc File Reference

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cpu_mips.cc File Reference
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/types.h>
#include <ctype.h>
#include <unistd.h>
#include "../../config.h"
#include "arcbios.h"
#include "cop0.h"
#include "cpu.h"
#include "cpu_mips.h"
#include "debugger.h"
#include "devices.h"
#include "emul.h"
#include "machine.h"
#include "memory.h"
#include "mips_cpu_types.h"
#include "opcodes_mips.h"
#include "settings.h"
#include "symbol.h"
#include "tmp_mips_head.cc"
#include "memory_mips.cc"
#include "tmp_mips_tail.cc"

Go to the source code of this file.

Macros

#define DYNTRANS_DUALMODE_32
 
#define DYNTRANS_DELAYSLOT
 

Functions

void mips_pc_to_pointers (struct cpu *)
 
void mips32_pc_to_pointers (struct cpu *)
 
int mips_cpu_new (struct cpu *cpu, struct memory *mem, struct machine *machine, int cpu_id, char *cpu_type_name)
 
void mips_cpu_dumpinfo (struct cpu *cpu)
 
void mips_cpu_list_available_types (void)
 
int mips_cpu_instruction_has_delayslot (struct cpu *cpu, unsigned char *ib)
 
void mips_cpu_tlbdump (struct machine *m, int x, int rawflag)
 
int mips_cpu_disassemble_instr (struct cpu *cpu, unsigned char *originstr, int running, uint64_t dumpaddr)
 
void mips_cpu_register_dump (struct cpu *cpu, int gprs, int coprocs)
 
void mips_cpu_interrupt_assert (struct interrupt *interrupt)
 
void mips_cpu_interrupt_deassert (struct interrupt *interrupt)
 
void mips_cpu_exception (struct cpu *cpu, int exccode, int tlb, uint64_t vaddr, int coproc_nr, uint64_t vaddr_vpn2, int vaddr_asid, int x_64)
 

Macro Definition Documentation

◆ DYNTRANS_DELAYSLOT

#define DYNTRANS_DELAYSLOT

Definition at line 74 of file cpu_mips.cc.

◆ DYNTRANS_DUALMODE_32

#define DYNTRANS_DUALMODE_32

Definition at line 73 of file cpu_mips.cc.

Function Documentation

◆ mips32_pc_to_pointers()

void mips32_pc_to_pointers ( struct cpu )

◆ mips_cpu_disassemble_instr()

int mips_cpu_disassemble_instr ( struct cpu cpu,
unsigned char *  originstr,
int  running,
uint64_t  dumpaddr 
)

◆ mips_cpu_dumpinfo()

void mips_cpu_dumpinfo ( struct cpu cpu)

◆ mips_cpu_exception()

void mips_cpu_exception ( struct cpu cpu,
int  exccode,
int  tlb,
uint64_t  vaddr,
int  coproc_nr,
uint64_t  vaddr_vpn2,
int  vaddr_asid,
int  x_64 
)

◆ mips_cpu_instruction_has_delayslot()

int mips_cpu_instruction_has_delayslot ( struct cpu cpu,
unsigned char *  ib 
)

◆ mips_cpu_interrupt_assert()

void mips_cpu_interrupt_assert ( struct interrupt interrupt)

◆ mips_cpu_interrupt_deassert()

void mips_cpu_interrupt_deassert ( struct interrupt interrupt)

◆ mips_cpu_list_available_types()

void mips_cpu_list_available_types ( void  )

Definition at line 423 of file cpu_mips.cc.

References debug, MIPS_CPU_TYPE_DEFS, mips_cpu_type_def::name, and strlen().

◆ mips_cpu_new()

int mips_cpu_new ( struct cpu cpu,
struct memory mem,
struct machine machine,
int  cpu_id,
char *  cpu_type_name 
)

Definition at line 89 of file cpu_mips.cc.

References cpu::byte_order, mips_cpu::cache, CACHE_DATA, CACHE_INSTRUCTION, mips_cpu::cache_last_paddr, mips_cpu::cache_linesize, mips_cpu::cache_mask, mips_cpu::cache_pdcache, mips_cpu::cache_pdcache_linesize, mips_cpu::cache_picache, mips_cpu::cache_picache_linesize, mips_cpu::cache_secondary, mips_cpu::cache_secondary_linesize, mips_cpu::cache_size, mips_cpu::cache_tags, cpu::cd, CHECK_ALLOCATION, COP0_STATUS, mips_cpu::coproc, CPU_SETTINGS_ADD_REGISTER64, mips_cpu::cpu_type, debug, DEFAULT_PCACHE_LINESIZE, DEFAULT_PCACHE_SIZE, EMUL_LITTLE_ENDIAN, interrupt::extra, mips_cpu::gpr, mips_cpu::hi, IMPOSSIBLE_PADDR, INITIAL_STACK_POINTER, cpu::instruction_has_delayslot, interrupt::interrupt_assert, INTERRUPT_CONNECT, interrupt::interrupt_deassert, interrupt_handler_register(), cpu::invalidate_code_translation, cpu::invalidate_translation_caches, mips_cpu::irq_compare, cpu::is_32bit, mips_cpu_type_def::isa_level, interrupt::line, mips_cpu::lo, cpu::machine, cpu::memory_rw, cpu::mips, mips32_invalidate_code_translation(), mips32_invalidate_translation_caches(), mips32_run_instr(), mips32_update_translation_table(), mips_coproc_new(), mips_cpu_instruction_has_delayslot(), mips_cpu_interrupt_assert(), mips_cpu_interrupt_deassert(), MIPS_CPU_TYPE_DEFS, MIPS_GPR_SP, mips_invalidate_code_translation(), mips_invalidate_translation_caches(), mips_memory_rw(), MIPS_R2000, MIPS_R3000, MIPS_R4100, mips_run_instr(), mips_update_translation_table(), MMU10K, MMU3K, MMU8K, mips_cpu_type_def::mmu_model, N_MIPS_GPRS, interrupt::name, mips_cpu_type_def::name, cpu::name, cpu::path, cpu::pc, mips_cpu_type_def::pdcache, mips_cpu_type_def::pdlinesize, mips_cpu_type_def::picache, mips_cpu_type_def::pilinesize, machine::prom_emulation, mips_coproc::reg, mips_cpu_type_def::rev, cpu::run_instr, mips_cpu_type_def::scache, mips_cpu_type_def::slinesize, STATUS_FR, STATUS_IM_SHIFT, store_32bit_word(), r3000_cache_line::tag_paddr, r3000_cache_line::tag_valid, cpu::translate_v2p, translate_v2p_generic(), translate_v2p_mmu10k(), translate_v2p_mmu3k(), translate_v2p_mmu4100(), translate_v2p_mmu8k(), and cpu::update_translation_table.

◆ mips_cpu_register_dump()

void mips_cpu_register_dump ( struct cpu cpu,
int  gprs,
int  coprocs 
)

◆ mips_cpu_tlbdump()

void mips_cpu_tlbdump ( struct machine m,
int  x,
int  rawflag 
)

◆ mips_pc_to_pointers()

void mips_pc_to_pointers ( struct cpu )

Generated on Fri Dec 7 2018 19:52:23 for GXemul by doxygen 1.8.13