cpu_mips.h File Reference

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cpu_mips.h File Reference
#include "interrupt.h"
#include "misc.h"

Go to the source code of this file.

Classes

struct  mips_cpu_type_def
 
struct  mips_tlb
 
struct  mips_coproc
 
struct  r3000_cache_line
 
struct  mips_cpu
 

Macros

#define INITIAL_PC   0xffffffffbfc00000ULL
 
#define INITIAL_STACK_POINTER   (0xffffffffa0008000ULL - 256)
 
#define N_MIPS_COPROC_REGS   32
 
#define N_MIPS_FCRS   32
 
#define MIPS_FPU_FCIR   0
 
#define MIPS_FPU_FCCR   25
 
#define MIPS_FPU_FCSR   31
 
#define MIPS_FCSR_FCC0_SHIFT   23
 
#define MIPS_FCSR_FCC1_SHIFT   25
 
#define N_VADDR_TO_TLB_INDEX_ENTRIES   (1 << 20)
 
#define N_MIPS_COPROCS   4
 
#define N_MIPS_GPRS   32 /* General purpose registers */
 
#define N_MIPS_FPRS   32 /* Floating point registers */
 
#define MIPS_REGISTER_NAMES
 
#define MIPS_GPR_ZERO   0 /* zero */
 
#define MIPS_GPR_AT   1 /* at */
 
#define MIPS_GPR_V0   2 /* v0 */
 
#define MIPS_GPR_V1   3 /* v1 */
 
#define MIPS_GPR_A0   4 /* a0 */
 
#define MIPS_GPR_A1   5 /* a1 */
 
#define MIPS_GPR_A2   6 /* a2 */
 
#define MIPS_GPR_A3   7 /* a3 */
 
#define MIPS_GPR_T0   8 /* t0 */
 
#define MIPS_GPR_T1   9 /* t1 */
 
#define MIPS_GPR_T2   10 /* t2 */
 
#define MIPS_GPR_T3   11 /* t3 */
 
#define MIPS_GPR_T4   12 /* t4 */
 
#define MIPS_GPR_T5   13 /* t5 */
 
#define MIPS_GPR_T6   14 /* t6 */
 
#define MIPS_GPR_T7   15 /* t7 */
 
#define MIPS_GPR_S0   16 /* s0 */
 
#define MIPS_GPR_S1   17 /* s1 */
 
#define MIPS_GPR_S2   18 /* s2 */
 
#define MIPS_GPR_S3   19 /* s3 */
 
#define MIPS_GPR_S4   20 /* s4 */
 
#define MIPS_GPR_S5   21 /* s5 */
 
#define MIPS_GPR_S6   22 /* s6 */
 
#define MIPS_GPR_S7   23 /* s7 */
 
#define MIPS_GPR_T8   24 /* t8 */
 
#define MIPS_GPR_T9   25 /* t9 */
 
#define MIPS_GPR_K0   26 /* k0 */
 
#define MIPS_GPR_K1   27 /* k1 */
 
#define MIPS_GPR_GP   28 /* gp */
 
#define MIPS_GPR_SP   29 /* sp */
 
#define MIPS_GPR_FP   30 /* fp */
 
#define MIPS_GPR_RA   31 /* ra */
 
#define N_HI6   64
 
#define N_SPECIAL   64
 
#define N_REGIMM   32
 
#define IMPOSSIBLE_PADDR   0x1212343456566767ULL
 
#define DEFAULT_PCACHE_SIZE   15 /* 32 KB */
 
#define DEFAULT_PCACHE_LINESIZE   5 /* 32 bytes */
 
#define R3000_TAG_VALID   1
 
#define R3000_TAG_DIRTY   2
 
#define MIPS_IC_ENTRIES_SHIFT   10
 
#define MIPS_N_IC_ARGS   3
 
#define MIPS_INSTR_ALIGNMENT_SHIFT   2
 
#define MIPS_IC_ENTRIES_PER_PAGE   (1 << MIPS_IC_ENTRIES_SHIFT)
 
#define MIPS_PC_TO_IC_ENTRY(a)
 
#define MIPS_ADDR_TO_PAGENR(a)
 
#define MIPS_L2N   17
 
#define MIPS_L3N   18
 
#define MIPS_MAX_VPH_TLB_ENTRIES   192
 

Functions

void mips_cpu_interrupt_assert (struct interrupt *interrupt)
 
void mips_cpu_interrupt_deassert (struct interrupt *interrupt)
 
int mips_cpu_instruction_has_delayslot (struct cpu *cpu, unsigned char *ib)
 
void mips_cpu_tlbdump (struct machine *m, int x, int rawflag)
 
void mips_cpu_register_match (struct machine *m, char *name, int writeflag, uint64_t *valuep, int *match_register)
 
void mips_cpu_register_dump (struct cpu *cpu, int gprs, int coprocs)
 
int mips_cpu_disassemble_instr (struct cpu *cpu, unsigned char *instr, int running, uint64_t addr)
 
void mips_cpu_exception (struct cpu *cpu, int exccode, int tlb, uint64_t vaddr, int coproc_nr, uint64_t vaddr_vpn2, int vaddr_asid, int x_64)
 
int mips_cpu_run (struct emul *emul, struct machine *machine)
 
void mips_cpu_dumpinfo (struct cpu *cpu)
 
void mips_cpu_list_available_types (void)
 
int mips_cpu_family_init (struct cpu_family *)
 
struct mips_coprocmips_coproc_new (struct cpu *cpu, int coproc_nr)
 
void mips_coproc_tlb_set_entry (struct cpu *cpu, int entrynr, int size, uint64_t vaddr, uint64_t paddr0, uint64_t paddr1, int valid0, int valid1, int dirty0, int dirty1, int global, int asid, int cachealgo0, int cachealgo1)
 
void coproc_register_read (struct cpu *cpu, struct mips_coproc *cp, int reg_nr, uint64_t *ptr, int select)
 
void coproc_register_write (struct cpu *cpu, struct mips_coproc *cp, int reg_nr, uint64_t *ptr, int flag64, int select)
 
void coproc_tlbpr (struct cpu *cpu, int readflag)
 
void coproc_tlbwri (struct cpu *cpu, int randomflag)
 
void coproc_rfe (struct cpu *cpu)
 
void coproc_eret (struct cpu *cpu)
 
void coproc_function (struct cpu *cpu, struct mips_coproc *cp, int cpnr, uint32_t function, int unassemble_only, int running)
 
int memory_cache_R3000 (struct cpu *cpu, int cache, uint64_t paddr, int writeflag, size_t len, unsigned char *data)
 
int mips_memory_rw (struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
 
int translate_v2p_mmu3k (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 
int translate_v2p_mmu8k (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 
int translate_v2p_mmu10k (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 
int translate_v2p_mmu4100 (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 
int translate_v2p_generic (struct cpu *cpu, uint64_t vaddr, uint64_t *return_addr, int flags)
 
void mips_unaligned_loadstore (struct cpu *cpu, struct mips_instr_call *ic, int is_left, int wlen, int store)
 
int mips_run_instr (struct cpu *cpu)
 
void mips_update_translation_table (struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
 
void mips_invalidate_translation_caches (struct cpu *cpu, uint64_t, int)
 
void mips_invalidate_code_translation (struct cpu *cpu, uint64_t, int)
 
int mips32_run_instr (struct cpu *cpu)
 
void mips32_update_translation_table (struct cpu *cpu, uint64_t vaddr_page, unsigned char *host_page, int writeflag, uint64_t paddr_page)
 
void mips32_invalidate_translation_caches (struct cpu *cpu, uint64_t, int)
 
void mips32_invalidate_code_translation (struct cpu *cpu, uint64_t, int)
 

Macro Definition Documentation

◆ DEFAULT_PCACHE_LINESIZE

#define DEFAULT_PCACHE_LINESIZE   5 /* 32 bytes */

Definition at line 176 of file cpu_mips.h.

Referenced by mips_cpu_new().

◆ DEFAULT_PCACHE_SIZE

#define DEFAULT_PCACHE_SIZE   15 /* 32 KB */

Definition at line 175 of file cpu_mips.h.

Referenced by mips_cpu_new().

◆ IMPOSSIBLE_PADDR

#define IMPOSSIBLE_PADDR   0x1212343456566767ULL

Definition at line 173 of file cpu_mips.h.

Referenced by mips_cpu_new().

◆ INITIAL_PC

#define INITIAL_PC   0xffffffffbfc00000ULL

Definition at line 68 of file cpu_mips.h.

Referenced by DEVINIT().

◆ INITIAL_STACK_POINTER

#define INITIAL_STACK_POINTER   (0xffffffffa0008000ULL - 256)

Definition at line 69 of file cpu_mips.h.

Referenced by DEVINIT(), MACHINE_SETUP(), and mips_cpu_new().

◆ MIPS_ADDR_TO_PAGENR

#define MIPS_ADDR_TO_PAGENR (   a)
Value:
#define MIPS_INSTR_ALIGNMENT_SHIFT
Definition: cpu_mips.h:189
#define MIPS_IC_ENTRIES_SHIFT
Definition: cpu_mips.h:186

Definition at line 193 of file cpu_mips.h.

◆ MIPS_FCSR_FCC0_SHIFT

#define MIPS_FCSR_FCC0_SHIFT   23

Definition at line 95 of file cpu_mips.h.

◆ MIPS_FCSR_FCC1_SHIFT

#define MIPS_FCSR_FCC1_SHIFT   25

Definition at line 96 of file cpu_mips.h.

◆ MIPS_FPU_FCCR

#define MIPS_FPU_FCCR   25

Definition at line 93 of file cpu_mips.h.

◆ MIPS_FPU_FCIR

#define MIPS_FPU_FCIR   0

Definition at line 92 of file cpu_mips.h.

◆ MIPS_FPU_FCSR

#define MIPS_FPU_FCSR   31

Definition at line 94 of file cpu_mips.h.

◆ MIPS_GPR_A0

#define MIPS_GPR_A0   4 /* a0 */

Definition at line 138 of file cpu_mips.h.

◆ MIPS_GPR_A1

#define MIPS_GPR_A1   5 /* a1 */

Definition at line 139 of file cpu_mips.h.

◆ MIPS_GPR_A2

#define MIPS_GPR_A2   6 /* a2 */

Definition at line 140 of file cpu_mips.h.

◆ MIPS_GPR_A3

#define MIPS_GPR_A3   7 /* a3 */

Definition at line 141 of file cpu_mips.h.

◆ MIPS_GPR_AT

#define MIPS_GPR_AT   1 /* at */

Definition at line 135 of file cpu_mips.h.

◆ MIPS_GPR_FP

#define MIPS_GPR_FP   30 /* fp */

Definition at line 164 of file cpu_mips.h.

◆ MIPS_GPR_GP

#define MIPS_GPR_GP   28 /* gp */

Definition at line 162 of file cpu_mips.h.

◆ MIPS_GPR_K0

#define MIPS_GPR_K0   26 /* k0 */

Definition at line 160 of file cpu_mips.h.

◆ MIPS_GPR_K1

#define MIPS_GPR_K1   27 /* k1 */

Definition at line 161 of file cpu_mips.h.

◆ MIPS_GPR_RA

#define MIPS_GPR_RA   31 /* ra */

Definition at line 165 of file cpu_mips.h.

◆ MIPS_GPR_S0

#define MIPS_GPR_S0   16 /* s0 */

Definition at line 150 of file cpu_mips.h.

◆ MIPS_GPR_S1

#define MIPS_GPR_S1   17 /* s1 */

Definition at line 151 of file cpu_mips.h.

◆ MIPS_GPR_S2

#define MIPS_GPR_S2   18 /* s2 */

Definition at line 152 of file cpu_mips.h.

◆ MIPS_GPR_S3

#define MIPS_GPR_S3   19 /* s3 */

Definition at line 153 of file cpu_mips.h.

◆ MIPS_GPR_S4

#define MIPS_GPR_S4   20 /* s4 */

Definition at line 154 of file cpu_mips.h.

◆ MIPS_GPR_S5

#define MIPS_GPR_S5   21 /* s5 */

Definition at line 155 of file cpu_mips.h.

◆ MIPS_GPR_S6

#define MIPS_GPR_S6   22 /* s6 */

Definition at line 156 of file cpu_mips.h.

◆ MIPS_GPR_S7

#define MIPS_GPR_S7   23 /* s7 */

Definition at line 157 of file cpu_mips.h.

◆ MIPS_GPR_SP

#define MIPS_GPR_SP   29 /* sp */

Definition at line 163 of file cpu_mips.h.

◆ MIPS_GPR_T0

#define MIPS_GPR_T0   8 /* t0 */

Definition at line 142 of file cpu_mips.h.

◆ MIPS_GPR_T1

#define MIPS_GPR_T1   9 /* t1 */

Definition at line 143 of file cpu_mips.h.

◆ MIPS_GPR_T2

#define MIPS_GPR_T2   10 /* t2 */

Definition at line 144 of file cpu_mips.h.

◆ MIPS_GPR_T3

#define MIPS_GPR_T3   11 /* t3 */

Definition at line 145 of file cpu_mips.h.

◆ MIPS_GPR_T4

#define MIPS_GPR_T4   12 /* t4 */

Definition at line 146 of file cpu_mips.h.

◆ MIPS_GPR_T5

#define MIPS_GPR_T5   13 /* t5 */

Definition at line 147 of file cpu_mips.h.

◆ MIPS_GPR_T6

#define MIPS_GPR_T6   14 /* t6 */

Definition at line 148 of file cpu_mips.h.

◆ MIPS_GPR_T7

#define MIPS_GPR_T7   15 /* t7 */

Definition at line 149 of file cpu_mips.h.

◆ MIPS_GPR_T8

#define MIPS_GPR_T8   24 /* t8 */

Definition at line 158 of file cpu_mips.h.

◆ MIPS_GPR_T9

#define MIPS_GPR_T9   25 /* t9 */

Definition at line 159 of file cpu_mips.h.

◆ MIPS_GPR_V0

#define MIPS_GPR_V0   2 /* v0 */

Definition at line 136 of file cpu_mips.h.

◆ MIPS_GPR_V1

#define MIPS_GPR_V1   3 /* v1 */

Definition at line 137 of file cpu_mips.h.

◆ MIPS_GPR_ZERO

#define MIPS_GPR_ZERO   0 /* zero */

Definition at line 134 of file cpu_mips.h.

◆ MIPS_IC_ENTRIES_PER_PAGE

#define MIPS_IC_ENTRIES_PER_PAGE   (1 << MIPS_IC_ENTRIES_SHIFT)

◆ MIPS_IC_ENTRIES_SHIFT

#define MIPS_IC_ENTRIES_SHIFT   10

Definition at line 186 of file cpu_mips.h.

◆ MIPS_INSTR_ALIGNMENT_SHIFT

#define MIPS_INSTR_ALIGNMENT_SHIFT   2

◆ MIPS_L2N

#define MIPS_L2N   17

Definition at line 196 of file cpu_mips.h.

◆ MIPS_L3N

#define MIPS_L3N   18

Definition at line 197 of file cpu_mips.h.

◆ MIPS_MAX_VPH_TLB_ENTRIES

#define MIPS_MAX_VPH_TLB_ENTRIES   192

Definition at line 199 of file cpu_mips.h.

◆ MIPS_N_IC_ARGS

#define MIPS_N_IC_ARGS   3

Definition at line 188 of file cpu_mips.h.

◆ MIPS_PC_TO_IC_ENTRY

#define MIPS_PC_TO_IC_ENTRY (   a)
Value:
#define MIPS_INSTR_ALIGNMENT_SHIFT
Definition: cpu_mips.h:189
#define MIPS_IC_ENTRIES_PER_PAGE
Definition: cpu_mips.h:190

Definition at line 191 of file cpu_mips.h.

◆ MIPS_REGISTER_NAMES

#define MIPS_REGISTER_NAMES
Value:
{ \
"zr", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra" }

Definition at line 128 of file cpu_mips.h.

◆ N_HI6

#define N_HI6   64

Definition at line 167 of file cpu_mips.h.

◆ N_MIPS_COPROC_REGS

#define N_MIPS_COPROC_REGS   32

Definition at line 78 of file cpu_mips.h.

◆ N_MIPS_COPROCS

#define N_MIPS_COPROCS   4

Definition at line 113 of file cpu_mips.h.

◆ N_MIPS_FCRS

#define N_MIPS_FCRS   32

Definition at line 91 of file cpu_mips.h.

◆ N_MIPS_FPRS

#define N_MIPS_FPRS   32 /* Floating point registers */

Definition at line 116 of file cpu_mips.h.

◆ N_MIPS_GPRS

#define N_MIPS_GPRS   32 /* General purpose registers */

Definition at line 115 of file cpu_mips.h.

◆ N_REGIMM

#define N_REGIMM   32

Definition at line 169 of file cpu_mips.h.

◆ N_SPECIAL

#define N_SPECIAL   64

Definition at line 168 of file cpu_mips.h.

◆ N_VADDR_TO_TLB_INDEX_ENTRIES

#define N_VADDR_TO_TLB_INDEX_ENTRIES   (1 << 20)

Definition at line 98 of file cpu_mips.h.

◆ R3000_TAG_DIRTY

#define R3000_TAG_DIRTY   2

Definition at line 183 of file cpu_mips.h.

◆ R3000_TAG_VALID

#define R3000_TAG_VALID   1

Definition at line 182 of file cpu_mips.h.

Function Documentation

◆ coproc_eret()

void coproc_eret ( struct cpu cpu)

◆ coproc_function()

void coproc_function ( struct cpu cpu,
struct mips_coproc cp,
int  cpnr,
uint32_t  function,
int  unassemble_only,
int  running 
)

◆ coproc_register_read()

void coproc_register_read ( struct cpu cpu,
struct mips_coproc cp,
int  reg_nr,
uint64_t *  ptr,
int  select 
)

◆ coproc_register_write()

void coproc_register_write ( struct cpu cpu,
struct mips_coproc cp,
int  reg_nr,
uint64_t *  ptr,
int  flag64,
int  select 
)

◆ coproc_rfe()

void coproc_rfe ( struct cpu cpu)

◆ coproc_tlbpr()

void coproc_tlbpr ( struct cpu cpu,
int  readflag 
)

◆ coproc_tlbwri()

void coproc_tlbwri ( struct cpu cpu,
int  randomflag 
)

◆ memory_cache_R3000()

int memory_cache_R3000 ( struct cpu cpu,
int  cache,
uint64_t  paddr,
int  writeflag,
size_t  len,
unsigned char *  data 
)

◆ mips32_invalidate_code_translation()

void mips32_invalidate_code_translation ( struct cpu cpu,
uint64_t  ,
int   
)

Referenced by mips_cpu_new().

◆ mips32_invalidate_translation_caches()

void mips32_invalidate_translation_caches ( struct cpu cpu,
uint64_t  ,
int   
)

Referenced by mips_cpu_new().

◆ mips32_run_instr()

int mips32_run_instr ( struct cpu cpu)

Referenced by mips_cpu_new().

◆ mips32_update_translation_table()

void mips32_update_translation_table ( struct cpu cpu,
uint64_t  vaddr_page,
unsigned char *  host_page,
int  writeflag,
uint64_t  paddr_page 
)

Referenced by mips_cpu_new().

◆ mips_coproc_new()

struct mips_coproc* mips_coproc_new ( struct cpu cpu,
int  coproc_nr 
)

◆ mips_coproc_tlb_set_entry()

void mips_coproc_tlb_set_entry ( struct cpu cpu,
int  entrynr,
int  size,
uint64_t  vaddr,
uint64_t  paddr0,
uint64_t  paddr1,
int  valid0,
int  valid1,
int  dirty0,
int  dirty1,
int  global,
int  asid,
int  cachealgo0,
int  cachealgo1 
)

◆ mips_cpu_disassemble_instr()

int mips_cpu_disassemble_instr ( struct cpu cpu,
unsigned char *  instr,
int  running,
uint64_t  addr 
)

◆ mips_cpu_dumpinfo()

void mips_cpu_dumpinfo ( struct cpu cpu)

◆ mips_cpu_exception()

void mips_cpu_exception ( struct cpu cpu,
int  exccode,
int  tlb,
uint64_t  vaddr,
int  coproc_nr,
uint64_t  vaddr_vpn2,
int  vaddr_asid,
int  x_64 
)

◆ mips_cpu_family_init()

int mips_cpu_family_init ( struct cpu_family )

◆ mips_cpu_instruction_has_delayslot()

int mips_cpu_instruction_has_delayslot ( struct cpu cpu,
unsigned char *  ib 
)

◆ mips_cpu_interrupt_assert()

void mips_cpu_interrupt_assert ( struct interrupt interrupt)

◆ mips_cpu_interrupt_deassert()

void mips_cpu_interrupt_deassert ( struct interrupt interrupt)

◆ mips_cpu_list_available_types()

void mips_cpu_list_available_types ( void  )

Definition at line 423 of file cpu_mips.cc.

References debug, MIPS_CPU_TYPE_DEFS, mips_cpu_type_def::name, and strlen().

◆ mips_cpu_register_dump()

void mips_cpu_register_dump ( struct cpu cpu,
int  gprs,
int  coprocs 
)

◆ mips_cpu_register_match()

void mips_cpu_register_match ( struct machine m,
char *  name,
int  writeflag,
uint64_t *  valuep,
int *  match_register 
)

◆ mips_cpu_run()

int mips_cpu_run ( struct emul emul,
struct machine machine 
)

◆ mips_cpu_tlbdump()

void mips_cpu_tlbdump ( struct machine m,
int  x,
int  rawflag 
)

◆ mips_invalidate_code_translation()

void mips_invalidate_code_translation ( struct cpu cpu,
uint64_t  ,
int   
)

Referenced by mips_cpu_new().

◆ mips_invalidate_translation_caches()

void mips_invalidate_translation_caches ( struct cpu cpu,
uint64_t  ,
int   
)

Referenced by mips_cpu_new().

◆ mips_memory_rw()

int mips_memory_rw ( struct cpu cpu,
struct memory mem,
uint64_t  vaddr,
unsigned char *  data,
size_t  len,
int  writeflag,
int  cache_flags 
)

Referenced by mips_cpu_new().

◆ mips_run_instr()

int mips_run_instr ( struct cpu cpu)

Referenced by mips_cpu_new().

◆ mips_unaligned_loadstore()

void mips_unaligned_loadstore ( struct cpu cpu,
struct mips_instr_call *  ic,
int  is_left,
int  wlen,
int  store 
)

◆ mips_update_translation_table()

void mips_update_translation_table ( struct cpu cpu,
uint64_t  vaddr_page,
unsigned char *  host_page,
int  writeflag,
uint64_t  paddr_page 
)

Referenced by mips_cpu_new().

◆ translate_v2p_generic()

int translate_v2p_generic ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

Referenced by mips_cpu_new().

◆ translate_v2p_mmu10k()

int translate_v2p_mmu10k ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

Referenced by mips_cpu_new().

◆ translate_v2p_mmu3k()

int translate_v2p_mmu3k ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

Referenced by mips_cpu_new().

◆ translate_v2p_mmu4100()

int translate_v2p_mmu4100 ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

Referenced by mips_cpu_new().

◆ translate_v2p_mmu8k()

int translate_v2p_mmu8k ( struct cpu cpu,
uint64_t  vaddr,
uint64_t *  return_addr,
int  flags 
)

Referenced by mips_cpu_new().


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