78 *bus = (t >> 16) & 0xff;
79 *dev = (t >> 11) & 0x1f;
80 *func = (t >> 8) & 0x7;
85 fatal(
"[ bus_pci_decompose_1: WARNING: reg = 0x%02x ]\n",
96 uint64_t *
data,
int len,
int writeflag)
98 struct pci_device *dev;
99 unsigned char *cfg_base;
100 uint64_t x, idata = *
data;
104 dev = pci_data->first_device;
105 while (dev != NULL) {
106 if (dev->bus == pci_data->cur_bus &&
107 dev->function == pci_data->cur_func &&
108 dev->device == pci_data->cur_device)
116 if (pci_data->cur_reg == 0)
117 *data = (uint64_t) -1;
121 fatal(
"[ bus_pci_data_access(): write to non-existant" 122 " device, bus %i func %i device %i ]\n",
123 pci_data->cur_bus, pci_data->cur_func,
124 pci_data->cur_device);
130 if (pci_data->last_was_write_ffffffff &&
133 cfg_base = dev->cfg_mem_size;
135 cfg_base = dev->cfg_mem;
139 for (i=len-1; i>=0; i--) {
140 int ofs = pci_data->cur_reg + i;
142 x |= cfg_base[ofs & (PCI_CFG_MEM_SIZE - 1)];
147 debug(
"[ bus_pci: write to PCI DATA: data = 0x%08llx ]\n",
149 if (idata == 0xffffffffULL &&
152 pci_data->last_was_write_ffffffff = 1;
156 if (dev->cfg_reg_write == NULL ||
157 dev->cfg_reg_write(dev, pci_data->cur_reg, *data) == 0) {
159 debug(
"[ bus_pci: write to PCI DATA: data = 0x%08llx" 160 " (current value = 0x%08llx); NOT YET" 161 " SUPPORTED. bus %i, device %i, function %i (%s)" 162 " register 0x%02x ]\n", (
long long)idata,
163 (
long long)x, pci_data->cur_bus,
164 pci_data->cur_device, pci_data->cur_func,
165 dev->name, pci_data->cur_reg);
171 fatal(
"\n[ NetBSD PCI detection stuff not" 172 " yet implemented for device '%s' ]\n",
182 pci_data->last_was_write_ffffffff = 0;
184 debug(
"[ bus_pci: read from PCI DATA, bus %i, device " 185 "%i, function %i (%s) register 0x%02x: (len=%i) 0x%08lx ]\n",
186 pci_data->cur_bus, pci_data->cur_device, pci_data->cur_func,
187 dev->name, pci_data->cur_reg, len, (
long)*data);
197 int bus,
int device,
int function,
int reg)
199 if (cpu == NULL || pci_data == NULL) {
200 fatal(
"bus_pci_setaddr(): NULL ptr\n");
204 pci_data->cur_bus = bus;
205 pci_data->cur_device = device;
206 pci_data->cur_func =
function;
207 pci_data->cur_reg =
reg;
217 struct memory *mem,
int bus,
int device,
int function,
220 struct pci_device *pd;
222 void (*init)(
struct machine *,
struct memory *,
struct pci_device *);
224 if (pci_data == NULL) {
225 fatal(
"bus_pci_add(): pci_data == NULL!\n");
233 pd = pci_data->first_device;
235 if (pd->bus == bus && pd->device == device &&
236 pd->function ==
function) {
237 fatal(
"bus_pci_add(): (bus %i, device %i, function" 238 " %i) already in use\n", bus, device,
function);
244 CHECK_ALLOCATION(pd = (
struct pci_device *) malloc(
sizeof(
struct pci_device)));
245 memset(pd, 0,
sizeof(
struct pci_device));
248 pd->next = pci_data->first_device;
249 pci_data->first_device = pd;
252 pd->pcibus = pci_data;
255 pd->function =
function;
266 PCI_SET_DATA_SIZE(ofs, 0x00100000 - 1);
269 fatal(
"No init function for PCI device \"%s\"?\n", name);
274 init(machine, mem, pd);
288 static void allocate_device_space(
struct pci_device *pd,
289 uint64_t portsize, uint64_t memsize,
290 uint64_t *portp, uint64_t *memp)
295 port = pd->pcibus->cur_pci_portbase;
297 port = ((port - 1) | (portsize - 1)) + 1;
298 pd->pcibus->cur_pci_portbase = port;
302 ((portsize - 1) & ~0xf) | 0xd);
303 pd->cur_mapreg_offset +=
sizeof(uint32_t);
307 mem = pd->pcibus->cur_pci_membase;
309 mem = ((mem - 1) | (memsize - 1)) + 1;
310 pd->pcibus->cur_pci_membase = mem;
313 ((memsize - 1) & ~0xf) | 0x0);
314 pd->cur_mapreg_offset +=
sizeof(uint32_t);
317 *portp = port + pd->pcibus->pci_actual_io_offset;
318 *memp = mem + pd->pcibus->pci_actual_mem_offset;
321 debug(
"pci device '%s' at", pd->name);
323 debug(
" port 0x%llx-0x%llx", (
long long)pd->pcibus->
324 cur_pci_portbase, (
long long)(pd->pcibus->
325 cur_pci_portbase + portsize - 1));
327 debug(
" mem 0x%llx-0x%llx", (
long long)pd->pcibus->
328 cur_pci_membase, (
long long)(pd->pcibus->
329 cur_pci_membase + memsize - 1));
333 pd->pcibus->cur_pci_portbase += portsize;
334 pd->pcibus->cur_pci_membase += memsize;
356 uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset,
357 uint64_t pci_portbase, uint64_t pci_membase,
const char *pci_irqbase,
358 uint64_t isa_portbase, uint64_t isa_membase,
const char *isa_irqbase)
363 memset(d, 0,
sizeof(
struct pci_data));
369 d->pci_actual_io_offset = pci_actual_io_offset;
370 d->pci_actual_mem_offset = pci_actual_mem_offset;
371 d->pci_portbase = pci_portbase;
372 d->pci_membase = pci_membase;
373 d->isa_portbase = isa_portbase;
374 d->isa_membase = isa_membase;
376 d->cur_pci_portbase = d->pci_portbase;
377 d->cur_pci_membase = d->pci_membase;
380 if (d->isa_portbase != 0 || d->isa_membase != 0) {
381 d->cur_pci_portbase += 0x10000;
382 d->cur_pci_membase += 0x10000;
406 #define PCI_VENDOR_INTEGRAPHICS 0x10ea 420 PCI_SET_DATA(0x10, 0x08000000);
422 snprintf(tmpstr,
sizeof(tmpstr),
"igsfb addr=0x%llx",
423 (
long long)(pd->pcibus->isa_membase + 0x08000000));
435 #define PCI_VENDOR_S3 0x5333 436 #define PCI_PRODUCT_S3_VIRGE 0x5631 437 #define PCI_PRODUCT_S3_VIRGE_DX 0x8a01 459 #define PCI_VENDOR_ALI 0x10b9 460 #define PCI_PRODUCT_ALI_M1543 0x1533 461 #define PCI_PRODUCT_ALI_M5229 0x5229 475 PCI_SET_DATA(0x44, 0x0000000e);
476 PCI_SET_DATA(0x58, 0x00000003);
482 0x7c000000, 0x80000000);
484 default:
fatal(
"ali_m1543 init: unimplemented machine type\n");
491 char tmpstr[2000], irqstr[1000];
502 snprintf(irqstr,
sizeof(irqstr),
"%s.10.isa",
503 pd->pcibus->irq_path);
505 default:
fatal(
"ali_m5229 init: unimplemented machine type\n");
511 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s.%i",
512 (
long long)(pd->pcibus->isa_portbase + 0x1f0),
526 #define PCI_VENDOR_ADP 0x9004 527 #define PCI_PRODUCT_ADP_AIC7880 0x8078 551 PCI_SET_DATA(0x30, 0x80010000);
554 PCI_SET_DATA(0x40, 0x00000180);
555 PCI_SET_DATA(0x40, 0x00000180);
580 #define PCI_VENDOR_GALILEO 0x11ab 581 #define PCI_PRODUCT_GALILEO_GT64011 0x4146 582 #define PCI_PRODUCT_GALILEO_GT64120 0x4620 583 #define PCI_PRODUCT_GALILEO_GT64260 0x6430 626 #define PCI_VENDOR_AMD 0x1022 627 #define PCI_PRODUCT_AMD_PCNET_PCI 0x2000 645 default:
fatal(
"pcn in non-implemented machine type %i\n",
670 #define PCI_VENDOR_INTEL 0x8086 671 #define PCI_PRODUCT_INTEL_31244 0x3200 672 #define PCI_PRODUCT_INTEL_82371SB_ISA 0x7000 673 #define PCI_PRODUCT_INTEL_82371SB_IDE 0x7010 674 #define PCI_PRODUCT_INTEL_82371AB_ISA 0x7110 675 #define PCI_PRODUCT_INTEL_82371AB_IDE 0x7111 676 #define PCI_PRODUCT_INTEL_SIO 0x0484 680 uint64_t port, memaddr;
694 default:
fatal(
"i31244 in non-implemented machine type %i\n",
701 allocate_device_space(pd, 0x1000, 0, &port, &memaddr);
702 allocate_device_space(pd, 0x1000, 0, &port, &memaddr);
708 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s.%i",
709 (
long long)(pd->pcibus->pci_actual_io_offset + 0),
710 pd->pcibus->irq_path_pci, irq & 255);
724 PCI_SET_DATA(reg, value);
768 PCI_SET_DATA(0x40, 0x20);
771 PCI_SET_DATA(0x60, 0x0f0e0b0a);
785 PCI_SET_DATA(reg, value);
821 PCI_SET_DATA(0x40, 0x80008000);
829 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx " 830 "irq=%s.isa.%i", (
long long)(pd->pcibus->isa_portbase +
831 0x1f0), pd->pcibus->irq_path_isa, 14);
838 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx " 839 "irq=%s.isa.%i", (
long long)(pd->pcibus->isa_portbase +
840 0x170), pd->pcibus->irq_path_isa, 15);
862 PCI_SET_DATA(0x20, 1);
866 PCI_SET_DATA(0x40, 0x80008000);
874 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 875 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x1f0),
876 pd->pcibus->irq_path_isa, 14);
883 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 884 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x170),
885 pd->pcibus->irq_path_isa, 15);
899 #define PCI_VENDOR_IBM 0x1014 900 #define PCI_PRODUCT_IBM_ISABRIDGE 0x000a 920 #define PCI_VENDOR_HEURICON 0x1223 921 #define PCI_PRODUCT_HEURICON_PMPPC 0x000e 946 #define PCI_VENDOR_VIATECH 0x1106 947 #define PCI_PRODUCT_VIATECH_VT82C586_IDE 0x1571 949 #define PCI_PRODUCT_VIATECH_VT82C586_ISA 0x0586 969 #define COBALT_PCIB_BOARD_ID_REG 0x94 970 #define COBALT_QUBE2_ID 5 1013 PCI_SET_DATA(0x40, 0x00000003);
1021 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1022 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x1f0),
1023 pd->pcibus->irq_path_isa, 14);
1030 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1031 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x170),
1032 pd->pcibus->irq_path_isa, 15);
1047 #define PCI_VENDOR_SYMPHONY 0x10ad 1048 #define PCI_PRODUCT_SYMPHONY_83C553 0x0565 1049 #define PCI_PRODUCT_SYMPHONY_82C105 0x0105 1065 0, 0x7c000000, 0x80000000);
1067 default:
fatal(
"symphony_83c553 init: unimplemented machine type\n");
1084 printf(
"reg = 0x%x\n", reg);
1089 printf(
" value = 0x%" PRIx32
"\n", value);
1095 PCI_SET_DATA(reg, value);
1103 PCI_SET_DATA(reg, value);
1126 PCI_SET_DATA(0x40, 0x00000003);
1135 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1136 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x1f0),
1137 pd->pcibus->irq_path_isa, 14);
1144 snprintf(tmpstr,
sizeof(tmpstr),
"wdc addr=0x%llx irq=%s." 1145 "isa.%i", (
long long)(pd->pcibus->isa_portbase + 0x170),
1146 pd->pcibus->irq_path_isa, 15);
1160 #define PCI_VENDOR_REALTEK 0x10ec 1161 #define PCI_PRODUCT_REALTEK_RT8139 0x8139 1165 uint64_t port, memaddr;
1166 int pci_int_line = 0x101, irq = 0;
1179 pci_int_line = 0x105;
1181 default:
fatal(
"rtl8139c for this machine has not been " 1182 "implemented yet\n");
1188 allocate_device_space(pd, 0x100, 0, &port, &memaddr);
1190 snprintf(irqstr,
sizeof(irqstr),
"%s.%i",
1191 pd->pcibus->irq_path_pci, irq);
1193 snprintf(tmpstr,
sizeof(tmpstr),
"rtl8139c addr=0x%llx " 1194 "irq=%s pci_little_endian=1", (
long long)port, irqstr);
1205 #define PCI_VENDOR_DEC 0x1011 1206 #define PCI_PRODUCT_DEC_21142 0x0019 1210 uint64_t port, memaddr;
1211 int pci_int_line = 0x101, irq = 0, isa = 0;
1229 pci_int_line = 0x101;
1234 pci_int_line = 0x407;
1239 pci_int_line = 0x20a;
1244 pci_int_line = 0x40a;
1249 pci_int_line = 0x101;
1254 pci_int_line = 0x101;
1260 allocate_device_space(pd, 0x100, 0x100, &port, &memaddr);
1263 snprintf(irqstr,
sizeof(irqstr),
"%s.isa.%i",
1264 pd->pcibus->irq_path_isa, irq);
1266 snprintf(irqstr,
sizeof(irqstr),
"%s.%i",
1267 pd->pcibus->irq_path_pci, irq);
1269 snprintf(tmpstr,
sizeof(tmpstr),
"dec21143 addr=0x%llx addr2=0x%llx " 1270 "irq=%s pci_little_endian=1", (
long long)port,
1271 (
long long)memaddr, irqstr);
1282 #define PCI_PRODUCT_DEC_21030 0x0004 1305 PCI_SET_DATA(0x10, 0x00000008);
1306 PCI_SET_DATA(0x30, 0x08000001);
1317 base = 0x100000000ULL;
1319 default:
fatal(
"dec21030 in non-implemented machine type %i\n",
1324 snprintf(tmpstr,
sizeof(tmpstr),
"dec21030 addr=0x%llx",
1337 #define PCI_VENDOR_MOT 0x1057 1338 #define PCI_PRODUCT_MOT_MPC105 0x0001 1361 #define PCI_VENDOR_APPLE 0x106b 1362 #define PCI_PRODUCT_APPLE_GC 0x0002 1363 #define PCI_PRODUCT_APPLE_UNINORTH1 0x001e 1367 uint64_t port, memaddr;
1380 allocate_device_space(pd, 0x10000, 0x10000, &port, &memaddr);
1385 uint64_t port, memaddr;
1397 allocate_device_space(pd, 0x10000, 0x10000, &port, &memaddr);
1406 #define PCI_VENDOR_ATI 0x1002 1407 #define PCI_PRODUCT_ATI_RADEON_9200_2 0x5962 1411 uint64_t port, memaddr;
1421 allocate_device_space(pd, 0x1000, 0x400000, &port, &memaddr);
#define PCI_PRODUCT_INTEL_82371SB_IDE
#define PCI_PRODUCT_VIATECH_VT82C586_ISA
void fatal(const char *fmt,...)
#define PCI_PRODUCT_INTEL_82371AB_ISA
#define COBALT_PCIB_BOARD_ID_REG
int diskimage_exist(struct machine *machine, int id, int type)
#define PCI_SUBCLASS_SYSTEM_PIC
int wdc_set_io_enabled(struct wdc_data *d, int io_enabled)
#define PCI_MAPREG_TYPE_IO
#define PCI_VENDOR_SYMPHONY
void dev_vga_init(struct machine *machine, struct memory *mem, uint64_t videomem_base, uint64_t control_base, const char *name)
#define PCI_INTERRUPT_REG
#define PCI_PRODUCT_DEC_21030
#define PCI_PRODUCT_ALI_M5229
void bus_pci_add(struct machine *machine, struct pci_data *pci_data, struct memory *mem, int bus, int device, int function, const char *name)
#define PCI_SUBCLASS_BRIDGE_HOST
#define PCI_PRODUCT_ALI_M1543
#define MACHINE_NETWINDER
#define PCI_ID_CODE(vid, pid)
#define PCI_PRODUCT_MOT_MPC105
#define PCI_VENDOR_REALTEK
#define PCI_PRODUCT_INTEL_82371SB_ISA
#define PCI_VENDOR_VIATECH
#define BUS_ISA_PCKBC_FORCE_USE
#define PCI_PRODUCT_VIATECH_VT82C586_IDE
#define PCI_PRODUCT_INTEL_SIO
void * device_add(struct machine *machine, const char *name_and_params)
#define PCI_SUBCLASS_MASS_STORAGE_SCSI
#define PCI_PRODUCT_DEC_21142
#define PCI_PRODUCT_INTEL_31244
#define CHECK_ALLOCATION(ptr)
#define PCI_VENDOR_HEURICON
int symphony_82c105_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
#define PCI_COMMAND_STATUS_REG
#define PCI_PRODUCT_S3_VIRGE_DX
void bus_pci_setaddr(struct cpu *cpu, struct pci_data *pci_data, int bus, int device, int function, int reg)
#define PCI_PRODUCT_GALILEO_GT64011
#define PCI_CLASS_NETWORK
#define PCI_PRODUCT_ADP_AIC7880
#define PCI_PRODUCT_GALILEO_GT64260
#define PCI_PRODUCT_HEURICON_PMPPC
void(*)(struct machine *machine, struct memory *mem, struct pci_device *pd) pci_lookup_initf(const char *name)
#define PCI_SUBCLASS_DISPLAY_VGA
#define PCI_CLASS_CODE(mainclass, subclass, interface)
#define PCI_VENDOR_INTEGRAPHICS
#define PCI_PRODUCT_SYMPHONY_82C105
#define PCI_COMMAND_MEM_ENABLE
#define PCI_PRODUCT_APPLE_UNINORTH1
int vt82c586_ide_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
#define PCI_VENDOR_GALILEO
struct bus_isa_data * bus_isa_init(struct machine *machine, char *interrupt_base_path, uint32_t bus_isa_flags, uint64_t isa_portbase, uint64_t isa_membase)
#define PCI_PRODUCT_APPLE_GC
#define PCI_PRODUCT_SYMPHONY_83C553
#define PCI_CLASS_DISPLAY
#define PCI_PRODUCT_AMD_PCNET_PCI
void bus_pci_decompose_1(uint32_t t, int *bus, int *dev, int *func, int *reg)
struct pci_data * bus_pci_init(struct machine *machine, const char *irq_path, uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset, uint64_t pci_portbase, uint64_t pci_membase, const char *pci_irqbase, uint64_t isa_portbase, uint64_t isa_membase, const char *isa_irqbase)
#define PCI_SUBCLASS_NETWORK_ETHERNET
#define PCI_PRODUCT_INTEL_82371AB_IDE
#define PCI_SUBCLASS_BRIDGE_ISA
#define PCI_SUBCLASS_MASS_STORAGE_IDE
int piix_ide_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
void bus_pci_data_access(struct cpu *cpu, struct pci_data *pci_data, uint64_t *data, int len, int writeflag)
int piix_isa_cfg_reg_write(struct pci_device *pd, int reg, uint32_t value)
#define PCI_PRODUCT_REALTEK_RT8139
#define PCI_PRODUCT_IBM_ISABRIDGE
#define PCI_CLASS_MASS_STORAGE
#define PCI_COMMAND_IO_ENABLE
#define BUS_ISA_PCKBC_NONPCSTYLE
const char * machine_name
#define PCI_PRODUCT_GALILEO_GT64120
#define PCI_BHLC_CODE(bist, type, multi, latency, cacheline)
#define PCI_PRODUCT_ATI_RADEON_9200_2